AMD EPYC Milan-X CPU Leaks Reveal Die Stacking Technology: Specs, Release Date and More Rumors

AMD EPYC Milan-X CPU Leaks Reveal Die Stacking Technology: Specs, Release Date and More Rumors
AMD EPYC Milan-X CPU Leaks Reveal Die Stacking Technology: Specs, Release Date and More Rumors Pixabay/Pexels

Chipmaker AMD is set to unveil a new array of X3D MCM processors in its third-generation EPYC Milan CPU server stack, which would be unprecedented in its roadmap.

These new chips are rumored to be named "Milan-X," which will be based on the EPYC architecture, but will offer the most robust memory deployment in any AMD server ever made.

AMD EPYC Milan X to Feature 3D Die Stacking

Leaks from old reliables Executable Fix and Patrick Schur on Twitter revealed that AMD is currently working on the new Milan-X CPU that is part of AMD's server-targeted EPYC family. These leaks further divulged that these Milan-X CPUs will have 3D die stacking technology.

AMD announced last year that they are developing a new generation of chips that utilize what they call X3D chip packaging technology, which is based on 3D stacking and 2.5D packaging, Tom's Hardware noted. This allows AMD to place dies on top of each other inside its multi-chip modules (MCM).

AMD presented a mockup of the CPU that had four compute and four stacked dies with one stack having four chips. It emphasized bandwidth density as a key offering in the X3D chips that are mainly targeted to power servers and high-performance computing workloads.

AMD EPYC Milan-X to Offer Same Zen 3 Cores As EPYC 7003

Milan-X, as leakers claim, will be the first lineup of chips that will feature the X3D packaging. Tom's Hardware further noted that the series would have the same Zen 3 cores as EPYC 7003 chips, given that both share a common name, "Milan."

Milan X, Executable Fix further noted, will be based on the Genesis I/O die, just like EPYC chips.

Its entire 2.5D/3D stack would be on top of a large interposer with an official diagram showing a four-high stack of high-bandwidth memory (HBM) per CPU cluster, with one HBM stack corresponding to a chip. AMD's official diagram suggests that Milan-X will offer more cores per chiplet, with either 16 or 32 cores.

AMD EPYC Milan-X CPU Leaks on Die Size

With Milan-X seen to offer 3D stacking, questions emerge on the amount of power the I/O die will need. To answer this, AMD might have finally decreased the die size to seven nanometers to limit the power consumption, WCCF Tech said.

As rumors suggest, Milan-X is a data center-only chip, but there is still no clear details on the cooling requirements in addressing its distinctive structure. AMD seems likely to use forced air, though liquid and immersion cooling remain as possible options.

AMD EPYC Milan-X CPU Leaks: Largest Memory Bandwidth

But what clearly stands out is the amount of memory bandwidth offered, which users assume could be the largest ever from AMD, Extreme Tech revealed. With the Milan-X chiplet having eight cores, and the chip utilizes the HBM2E standard, observers are expecting a range of about 300 GB to 500 GB of memory per chiplet. As such, the entire chip will have a total available memory bandwidth of more than 1 terabyte, and could also reach 2 TB.

Milan-X is certainly AMD's clear competitor to Intel's next generation Xeon processors, code-named Sapphire Rapids, which will feature 56 and 80 cores and integrates HBM 2 on-package. Sapphire Rapids is expected to roll out late this year or early 2022. Currently, there is no word yet on Milan-X's availability.

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